Power semiconductor devices, such as power metal oxide semiconductor field effect transistors (MOSFETs), have been widely used in power switching devices, such as power supplies, rectifiers, motor controllers, or so forth. Power semiconductor devices can be made with a trench topology to enhance power density.
Conventional fabrication processes for manufacturing a trench type power semiconductor device often involve several masks to accommodate forming complex structures, such as gate trenches and source trenches. Using multiple masks to etch adjacent source and gate trenches of different dimensions in different steps can be difficult due to errors introduced by the mask dimensions and alignment thereof at each masking step. Variations in semiconductor device fabrication can often lead to variations in device electrical performance such as on-state resistance (RDSon) and breakdown voltage.
Accordingly, there is a need to overcome the drawbacks and deficiencies in the art by providing a fabrication process that can substantially eliminate device defects during the fabrication of trench type power semiconductor devices while enhancing the electrical performance characteristics thereof.